Automotive dual-channel SiC half-bridge gate driver with two-level turn-off
← All reference designs · Vendor page: TI TIDA-01605
| Hardware | unknown |
|---|---|
| Status | active |
| Application | ev-obc, traction |
| Semiconductors | SiC |
| Key devices | UCC21530-Q1, SN6501-Q1, ISO7721-Q1 |
| Isolation | class: reinforced; tech: capacitive; v_iso_Vrms: 5700; v_iotm_Vpk: 8000 |
| Deliverables | schematic, bom, layout, design-guide, test-report |
| Target device | SiC-MOSFET, Si-MOSFET, IGBT |
| Configuration | half-bridge |
| Driver ICs | UCC21530-Q1 |
| CMTI (kV/µs) | 100 (vendor-claimed) |
| Peak source (A) | 4 |
| Peak sink (A) | 6 |
| V_GS on (V) | 15 |
| V_GS off (V) | -4 |
| Protections | desat, two-level-turnoff, uvlo |
| Bias supply | onboard-isolated-dcdc |
| Gate-drive power (W) | 1 (vendor-claimed) |
| Max f_sw (kHz) | 500 |
| Last verified | 2026-10-21 |
Notes
Why it is interesting: a compact 40 × 40 mm, 2-layer board with a discrete two-level turn-off. The DESAT threshold and second-stage delay are both configurable, so it is a good study of how to limit V_DS overshoot during short-circuit turn-off. The bias is an SN6501 push-pull supply with +15 V / −4 V, 1 W per channel.
Check against your device: P_gate = Q_g·ΔV_gs·f_sw. With ΔV_gs = 19 V and 1 W available, Q_g·f_sw ≤ 52.6 mA, e.g. ≤ 526 kHz at 100 nC. The bias power, not the 500 kHz driver rating, sets the real limit for larger dies. Note: CMTI is stated as > 100 V/ns (= 100 kV/µs), on the low side for aggressive SiC.
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Tags: push-pull-bias · 40x40mm-2-layer · configurable-desat-blanking